1. Field of the Invention
Aspects of the present invention relates to an organic light-emitting display device and a method of manufacturing an organic light-emitting display device. More particularly, aspects of the present invention relate to an organic light-emitting display device including a bottom gate type thin film transistor that can be easily manufactured, and a method of manufacturing an organic light-emitting display device.
2. Description of the Related Art
Thin film transistors have been used as switching or driving devices of flat panel displays such as liquid crystal displays or organic light-emitting display devices. Thin film transistors can be classified into top gate types and bottom gate types according to the position of the gate electrode. Top gate type thin film transistors are widely used in flat panel displays including organic light-emitting display devices.
Organic light-emitting display devices are self-emitting display devices that include an organic light-emitting layer between a pixel electrode and an opposite electrode. Organic light-emitting display devices have advantages such as a wide viewing angle, good contrast, and rapid response speed, and thus, have been highlighted as next generation display devices.
FIG. 1 is a schematic sectional view illustrating an organic light-emitting display device including a conventional top gate type thin film transistor. Referring to FIG. 1, the organic light-emitting display device includes, on a substrate 10, a buffer layer 11, a semiconductor layer 21, an inter-insulating layer 12, a gate electrode 22, a gate insulating layer 13, source and drain electrodes 23 and 24, a passivation layer 14, a pixel defining layer 15, a pixel electrode 27, an organic light-emitting layer 28, and an opposite electrode 29.
In order to manufacture the organic light-emitting display device, first, the buffer layer 11 and an amorphous silicon layer are sequentially deposited on the substrate 10, the amorphous silicon layer is crystallized into a polycrystalline silicon layer, and the polycrystalline silicon layer is patterned in a predetermined shape using a first mask. Then, the patterned polycrystalline silicon layer is ionically doped using a second mask so that source and drain regions are defined in the patterned polycrystalline silicon layer to thereby form the semiconductor layer 21.
Next, the inter-insulating layer 12 and a conductive material forming the gate electrode 22 are deposited on the buffer layer 11 and the semiconductor layer 21, and the conductive material is patterned in a predetermined shape using a third mask to form the gate electrode 22.
After forming the gate electrode 22, the gate insulating layer 13 is deposited on the gate electrode 22. Then, contact holes 25 are formed in the inter-insulating layer 12 and the gate insulating layer 13 using a fourth mask in order to electrically connect the source and drain electrodes 23 and 24 to the semiconductor layer 21.
After forming the contact holes 25, a source/drain electrode material is deposited on the gate insulating layer 13 and patterned in a predetermined shape using a fifth mask to form the source and drain electrodes 23 and 24.
After forming the source and drain electrodes 23 and 24, the passivation layer 14 is deposited on the source and drain electrodes 23 and 24 and the gate insulating layer 13, and a via hole 26 is formed in the passivation layer 14 using a sixth mask in order to electrically connect one of the source and drain electrodes 23 and 24 to the pixel electrode 27.
After forming the via hole 26, a conductive material is deposited on the passivation layer 14 and patterned using a seventh mask to form the pixel electrode 27.
After forming the pixel electrode 27, the pixel defining layer 15 is deposited on the passivation layer 14 and the pixel electrode 27, and patterned using an eighth mask so that the pixel electrode 27 is partially exposed. When a spacer (not shown) is further disposed on the pixel defining layer 15, the spacer is deposited and patterned using another mask (ninth mask).
The organic light-emitting layer 28 is deposited on an exposed portion of the pixel electrode 27 using a shadow mask or an open mask, and the opposite electrode 29 is then deposited on the organic light-emitting layer 28 using an open mask.
As described above, when manufacturing an organic light-emitting display device including a conventional top gate type thin film transistor, numerous mask processes are required for patterning, and each mask process involves a series of procedures including providing a photoresist coating, exposing the layer to be patterned to light, and developing the exposed layer. Thus, the manufacturing method is complicated, thus increasing manufacturing costs.